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The AIPS image sensor watching at its inventor, Yoshiaki Hagiwara.
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hagiwara-yoshiaki@aiplab.com ( http://www.aiplab.com/ )

hagiwara@ssis.or.jp ( http://www.ssis.or.jp/en/index.html )

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A Long, Long Story of Pinned Photodiode and SONY Hole Accumulation Diode (HAD)
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Hagiwara_Awards_and_Publication_List


Invention of Pinned Photodiode by Hagiwara in 1975(pdf)


Superlight Senstivity is the most important key feature for Video Camera.

Superlight Senstivity factor is define as the Singal to Noise ratio (S/N).

MOS CTD imagers had the serious CkT and clock noise and N was very large.

while CCD CTD imagers had the very low CkT and very low clock noise.

But CCD CTD imagers has the limited charge transfer efficiency of 99.995%,

which is not enough for the modern high resolution digital Era TV era.

Modern CMOS CTD has replaced CCD type CTD completely now.

CCD image sensors disaappeared completely now.

But we still use the P+NP junction type Pinned Photodiode

for the modern CMOS CTD type image sensors.


The light emitting diode (LED) is a semicondoctor

which transfroms the electric energy to the photo energy.

The invention of the blue light LED was very important.

And the inventor recieved the Noble Prize.


Solar Cell and Image Sensors are a semiconductor device

which is called as Photodiode that transforms the photo eneryg

to the electric energy.


The SONY hole accumulation diode (HAD) is by definition

the P+NPNsub junction Pinned Photodiode with the vertical

overflow drain function (VOD) which was invented by Hagiwara

at SONY in 1975. The original HAD was invented with the

following important features.

(1) SONY HAD is Buried Photodiode suited and used in the Modern

3D Stacked Multichip super light sensitive CMOS image sensor.


(2) SONY HAD is Depletion Photodiode, which is also Buried

Photodiode with the no image lag feature.


(3) SONY HAD is Pinned Photodiode, with the heavily doped P+

surface hole accumulation (HAD) layer which queches the

bad surface electric field resulting in the low surface dark

current feature. CCD has the serious dark current problem.


(4) SONY HAD is by definition the P+NPNsub junction type

Pinned Photodiode with the vertical overflow drain (VOD).


Physics of the photo electron hole separation of the hole

accumulation P+P system is unique and different from that

of the PN junction depletion region. This new mechanisim

was first explained in 1975 by Hagiwara in his Japanese

1975-127646 and 1975-127647 patents on the Pinned

Photodiode with the back light illumination scheme,

which is now very suited for the Modern 3D stacked

multichip CMOS image sensor with the Global Shutter

Buffer Memory (GSBM). The GSBM concept was also

Hagiwara 1975 invention and explained in his Japanese

1975-127646 and 1975-127647 patents .



Image Sensor is made of two important parts.



One is the PNP junction photodiode structure which converts

the photon energy into the electrical energy in the form of

the free active mobile electron charge carrier, according to

the light image, which we call Pinned Photodiode or SONY HAD.


Pinned Photodiode was invented by Hagiwara in1975 at SONY.

SONY HAD is Pinned Photodiode with vertical overflow drain (VOD).

Both SONY HAD and Pinned Photodiode were invented by Hagiwara.

See Japanese 1975-127647 and 1975-134985 patents invented by Hagwiara.






Please note that the (C) type structure of Pinned Photodiode shown below

has the most effective blue light photo electron generation efficiency.




Please note that the (C) type structure of Pinned Photodiode has the

most effective blue light photo electron generation efficiency since

the photo electron and hole separation is performed at the shortest

distance from the silicon surface. Besides the photo electron and

hole separation is performed in the electric field induced by the

built-in barrier potential VB = kT ln (NS/NA) caused by the

doping level differenece of the heavily doped surface P+ layer

doping level NS and the substrate doping level NA.





Actually Hagiwara at SONY invented the following important photodiodes.


(1) Buried Photodiode which is suited for the 3D multichip CMOS image sensors

(2) Depletion Photodiode which is defined as Buried Photodiode

with the no image lag feature.

(3) Pinned Photodiode which is defined as Depletion Photodiode

with the surface hole accumulation (HAD) which gives

the low surface dark current.

(4) SONY Hole Accumultion Diode which is defined as

the PNPN junction type Pinned Photodiode with

the vertical overflow drain (VOD) function.

Hagiwara at Sony invented the four types of photodiode in 1975.

See Japanese 1975-127647 and 1975-134985 patents invented by Hagwiara.

The actual Piined Photodiode may have had the
doping profile of P+PNPsub junction profile with
the deep ion implantation technique for the common
formation of the buried channel of BCCD and the
buried photodiode structures, instead of the P+NP-
structure as seen in the figure (C).

The P+N junction may have the serious leak current,
small but serious for high quality picture requirements.

The surface P+ layer has the dope level NS of 10
to the 18th order per cubic cm, the Psub and P have
the dope level NA of 10 to the 14th order per cubic cm.

However, the buried channel CCD and the buried
photodiode N layer has the dope level ND of 10
to the 16th order per cubic cm as Hagiwara reported
in his 1978 paper with the surface boron ion implantation
Qs of 3 x 10 to the 13th power and the buried channel dose
Qd of 1.7 x 10 to the 12th power.

The buried photodiode N layer has the dope level ND of 10
to the 16th order per cubic cm is quite heavily doped and
this is the reason why BCCD suffered the serious dark
current problem always. We will have the same serious
leakage current problem with the P+N junction too,

We actually needed to sandwich N region with the lightly
doped P region to achieve the low leakage.

Teranishi wrote P+NP- structure for the buried photodiode.

But actually Teranishi proposed the P++N+P structure with
P++N+ junction with the serious junction leakage current
in the real production level problems for the doping data.
.
There is the built-in barrier potential VB = kt ln ( NS/NA)
near the silicon surface of within 0.2 micro meter
which induced the strong local surface electric field
that can separate the photo generated electron and hole
near the surface. Since the blue light cannot penetrate
more than 0,3 micro meter into silicon crystal in depth,
this P+P structure helps to obtain the perfect quantum
efficiency for the blue light. That is why the Pinned
Photodiode has the excellent light sensitivity feature
for good color reproduction pictures at very low light level.

Since the surface P+ of 18th order and the buried N of
16th order both are quite heavily doped. We may have
the serious P+N junction leakage current.


Beside, by sandwiching the relatively heavily doped N layer
with the lightly doped P layer, we can avoid the junction leakage
current , resulting the low surface dark current. By doing so,
we can have relatively the heavy N buried layer and obtain
enough signal charge capacity.


The Pinned Photodiode is important because

(1)P+P structure produces the surface
built-in surface potential induced electric
field separating the photo electron and hole
at the surface, resulting the excellent
quantum efficiency

(2) the very low surface dark current feature and

(3) thirdly, the low image lag feature.

However , CCD has already had the image lag feature
and nothing was new about the image lag feature. But
Hagiwara showed in Fig. 6 of Japanese 1975-134985
Patent that the hole collector concept and the no image
Lag feature by drawing the empty potential well of the
Buried Photodiode with the HOLE collector and the
VOD electron Emitter terminal.

Hagiwara invented the P1N2P3 junction type Pinned
Photodiode with the P1 VOD emitter and the P3 Hole
Collector and the N2 Buried Photodiode with the
complete empty potential well when reset for no image
lag feature.


As you can see, the P+PNP junction type Pinned Photodiode (c)
is the best structure for the blue light sensitivity and for the low
PN jucntion leakage and the low surface dark current.




Hagiwara invented the P1N2P3 junction type Pinned
Photodiode with the P3 VOD emitter and the P1 Hole
Collector and the N2 Buried Photodiode with the
complete empty potential well when reset for no image
lag feature. See below. This is the evidence that
Hagiwara at SONY in 1975 is the inventor of the PNPN
junction photodiode which is called now as SONY HAD,
Pinned Photodiode with the vertical overflow drain (VOD).






This Pinnned Photodiode has the folowing important fearture.

(1) Excellent blue light sensitivity

(2) Very Low Surface Dark Current feature and

(3) the Low Image Lag feature


CCD has the same feature (3) of the low image lag. .


Hence, nothing is new about the low image lag feature.

But CCD does not have the following two features ,

(1) Excellent blue light sensitivity and

(2) Very Low Surface Dark Current.


However, Pinned Photodiode has these important features uniquely.




Image Sensor is made of two important parts.


The other part is the charge transfer device (CTD).

CCD type CTD was widely used in image sensors in the past.

And that is why we called the image sensors as "CCD image sensors".

However, CCD type CTD was completely replaced by CMOS type CTD now.

CCD became useless. We don't need CCD any more.

We used to call CCD image sensors as the super light sensitive and low dark current.

However, CCD itself is NOT super light sensitive, specially in short wave bulue light.

Moreover, CCD has the very serious dark current problem.

CCD was simply serving as a charge transfer device (CTD)

which is now repalced by CMOS type charge transfer device (CTD).

CMOS image sensor also now has the three important features of

(1) Excellent blue light sensitivity

(2) Very Low Surface Dark Current and

(3) the low image lag feature.

Why ?

Because CCD and CMOS image sensor both use

Pinned Photodiode which has these three important features.

CCD and CMOS are just CTDs.

They do NOT have these three important features.

Pinned Photodiode, invented by Hagiwara 1975, has these three important features.



The original Buried Pinned Photodiode was invented in 1975 by Hagiwara

at SONY for the back illumination scheme, with the front silicon wafer main

surface being connected to another digital processing chip in the 3D stacked

multichip smart image sensor configuration. See Japanese 1975-127647 patent.





Hagiwara, the inventor of Pinned Photodiode, is now interested in building

the human friendly artificial intelligent partner system (AIPS) .





Invention is very important.


Yes, Teranishi in NEC did a great job making for developping the first time

in the world the Interline CCD image sensor with the Buried Photodiode.

But Teranishi at NEC cannot become the inventor of the Buried Photodiode

since Hagiwara in 1975 at Sony invented the Buried Depletion Pinned Photodiode.



SONY developped the mass production technology of CCD and CMOS

image sensors. But SONY cannnot be the inventor of CCD nor the CMOS

image sensors. Teranishi at NEC is not the inventor of Pinned Photodiode.






Invention is very important (1)


Hagiwara at SONY in 1975 invented the P+NPNsub junction
type Pinned Photodiode with the vertical overflow drain (VOD)
which is identical and defined as the SONY hole accumulation
diode (HAD). Hagiwara also published a paper on the P+NPsub
junction type Pinned Photodiode which was used as the
super light sensitive image sensing unit for the 380H x 488V
frame transfer CCD image sensor with (1) very high blue light
quantum efficiency (2) very low surface dark current and (3)
no image lag picture quality. The CCD output image showed
no image lag feature which implied that not only the CCD
charge transfer device (CTD) but also the P+NP junction
Pinned Photodiode had NO image lag. Hagiwara showed
in his 1978 paper that the P+NP junction Pinned Photodiode,
Hagiwara invented, definitely had the no image lag feature.








Invention is very important (2)

Sony developped the semiconductor process technology
for a portable personal transistor radio for mass production.

Yoshiyuki Kawana and Toshio Kato were SONY pioneering
process ant device engineers at SONY for the technology
development efforts for bipolar transistor high performance.

However, Sony was not the inventor of the transistor.


Invention is very important (3)


SONY again developped super senstive low noise CCD image sensors.

But SONY was not the inventor of CCD.


After the bell lab invention of CCD analog shift register
as the charge transfer device (CTD), the conventional
MOS circuit type CTD was replaced by the CCD type
CTD. CCD became the super star.

After the invention of Peter Noble in 1966, we all knew
that, if we could include the active source follower circuit
in each pixel, we would not have needed the CCD type
CTD. But we could not wait for the advancement of
CMOS transistor scaling techology for in-pixel amp.

The CCD type CTD became the super star.

But CCD is just a charge transfer deivce (CTD).

CCD is NOT the image sensor device !

SONY was the inventor of HAD image sensor.

SONY HAD had the important features of the
super light sensitivity, low noise and low dark
current and with the vertical overflow drain
(VOD) function, Hagiwara 1975 invention.


Sony developed the super light sensitive low noise and low dark
current SONY Hole Accumulation Diode (HAD) and used for
the image sensor. CCD was used simply as the charge transfer
device (CTD). CCD was NOT used for the image sensing function.
CCD did NOT have the super blue light sensitivity, did NOT have
the excellent color reproduction capability. Moreover, CCD had
the serioous dark current problem.

The world ignored and did not know the wonderful features of
SONY HAD image sensor of Hagiwara 1975 invention.

However, Sony did not invent the CCD type charge transfer device.

For excellent image sensor quality, the direct features of the imaging
device (SONY HAD) is more important than the CCD or CMOS charge
transfer device(CTD). But the world did not undertand the importance.

The world did not undertand that SONY invented SONY HAD,
the hole accumulation diode (HAD) which is identical to the
Buired, Depletion and Pinned Photodiode with the vertical over
flow drain (VOD) function which was Hagiwara 1975 invention.

CCD image sensors are highly light sensitive with excellent
color reproduction at low light level and with low dark current
because of the surface P+ hole accumulation layer that was
Hagiwara 1975 invention.

CCD is just a charge transfer device, (CTD) which was replaced
now by CMOS circuit type CTD.

We no longer need CCD but we still need SONY HAD, Hagiwara
1975 invention, to have the features of highly light sensitivity
with excellent color reproduction at low light level and with low
dark current, which was invented by Hagiwara in 1975 and was
reported in Hagiwara 1978 paper for the first time in the world.

SONY deveplopped a very super light sensitive, low noise and no image lag
CCD video cameras, but SONY is not the inventor of CCD. The inventors
of CCD in Bell Lab USA received the Noble Prize. Invention is important.

However, SONY invented SONY HAD which is also the Buried, Depletion
and Pinned Photodiode. Hagiwara at SONY is the inventor. SONY HAD
has the feature of the very super light sensitive, low noise and no image lag.
SONY HAD is still used in the CMOS image sensors. That is why the
CMOS image sensors have the feature of the very super light sensitive,
low noise and no image lag. CCD and CMOS are important as the charge
transfer device (CTD). CCD and CMOS circuits are not image sensors !!!!

The super light sensitive image sensor was invented by Hagiwara in 1975.
The world does not know this fact... alas !!!

A very deep knowledge with physics background is needed to understand
the small world of semiconductor device behaviors in solid image sensors.

Photodiode structure itself is simple.

It is just a combination of P and N type semiconductor materials.

Its device behavior , however, is very comlicated.

And we need to have a deep understanding of semiconductor device physics....




(1) Japanese 1975-127646 patent defined the P+PNPN junction type Pinned Photodiode.



(2) Japanese 1975-127647 patent defined the P+PNP junction type Pinned Photodiode.



(3) Japanese 1975-134985 patent defined the P+NPNsub junction type Pinned Photodiode.





The surface P+ emitter is also the hole collector. Figure 6 of Japanese 194985 patent
defined the P+NP jucntion Pinned Photode with the complete empty potential profile
which is the evidence of the complete charge transfer action of the P+NP junction
Pinned Photodiode defined by Hagiwara 1975 invention. This is the evidence of the
image lag free feature of the PNP junction type Pinned Photodiode of Hagiwara Invention.

Fossum 2014 paper did not correctly describe Hagiwara 1975-134985 patent.

Fossum 2014 did not describe Hagiwara 1978 paper and Hagiwara 1975-127646 and
1975-127647 Japanese patents. Fossum 2014 paper is a fake paper insulting SONY
and Hagiwara 1975 inventions of Pinned Photodiode. Fossum is a BIG Liar !!!!!!!!!

Fossum is a fraud and a big liar.

Fossum 2014 paper is a fake.

Hagiwara is the true inventor of Pinned Photodiode.

Hagiwara invented SONY HAD and Pinned Photodiode in 1975.





Hagiwara did not emphasize the no image lag feature because CCD had already
had the no image lag feature with the complete charge transfer mode.

The no image lag feature is nothing new.

The Pinned photodiode was important first of all because of the blue light
quantum efficiency and secondly because of the low surface dark current
feature. The no image lag feature is the third important one since the no
image lag feature was nothing new. CCD already had the no image lag
featute. SONY Interline CCD with the thin Polysilicon transparent gate
had the no image lag feature, too. Hence nothing was new about the
no image lag feature in 1975 already since the invention of CCD in 1970.

In Hagiwara 1978 paper, the three important features of the PNP junction
Pinned Photodiode were explained. (1) Excellent blue light sensitivity
(2) Low Surface Dark Current and (3) No Image Lag Feature observed
in the fast moving action pictures of the SONY CCD video camera,
supported also by the observation of the very good charge transfer
efficency of 99.999% of the CCD output signal wave. See below.



Hagiwara also explained and showed in applicaiton figures that his proposed
Pinned Photodiode structure has also the image lag feature.

See Hagiwara Japanese 1975-127646, 1975-127647 and 1975-134985 patents,
which explained clearly the image lag feature in the application patent figures.

Ignorance is a mistake, but neligence is a sin.
And both invite crime and unhappy results.

In Fossum 2014 paper, Fossum lied to the world that SONY HAD was created after
NEC Teranishi work in 1980. The truth is SONY HAD was invented by Hagiwara in 1975.
On the contrary, NEC Teranishi work is a copy of Hagiwara 1975 invention.

After the SONY-NEC secret patent war on the Pinned Photodiode,
NEC became silent and stopped making image sensor business !!!!

See Japanese 1975-134985 patent invented by Hagiwara in 1975.

Fossum insulted SONY and Hagiwara by a big lie !!!!!



Details are explained in the following figures.

http://www.aiplab.com/First_Transistor_1947.jpg

http://www.aiplab.com/Fossum_is_a_liar.jpg

http://www.aiplab.com/image77.jpg

http://www.aiplab.com/Hagiwara_is_the_inventor_of_Pinned_Photodiode_SONY_HAD.jpg

http://www.aiplab.com/HADSensor1975.jpg

http://www.aiplab.com/004_FCX018_Pinned_Photodiode.jpg

http://www.aiplab.com/image201.jpg

http://www.aiplab.com/ElectricalEnginnerering_on_Pinned_Photodiode.jpg

http://www.aiplab.com/E-mail_communication_with_Albert_and_Yoshi.pdf

http://www.aiplab.com/E-mail_Communication_on_Sony_Loral_Patent_War.pdf

See also the three basic patents on the invention of Pinned Photodiode in 1975.

Japanese 1975-127646, 1975-127647 and 1975-134985 patents by Hagiwara.

And convince yourself that NEC Teranishi 1980-123259 patent and
Toshiba Yamada 1980-1971 patent both are duplicate and invalid patents.


SONY has cross patent liscense agreements with NEC and Toshiba and
SONY has no reason to attack NEC and Toshiba patents.

But invention is very important.

It must be cleared who was the real inventor for the honor of the true inventor.

The world has the right to know the truth.



(4) Hagiwara 1978 paper defined the P+NPsub junction type Pinned Photodiode.









Hagiwara at SONY also designed and developped in 1980 the Interline CCD image sensor
with the thin-polysilicon blue light sensitive transparent electrodes with the complete
image lag free feature needed for the fast action video camera used in the 747 jumbo jet.




Nothing is new about the image lag free feature since the CCD has this feature already.

The important features of the Buried Depletion Pinned Photodiode was emphasized
by Hagiwara 1975 inventions are (1) Excellent Blue light sensitivity by the surface
P+ hole accumulation layer and (2) No dark current feature by the surface P+ pinned
potential with no surface electric field. The surface electric field was the reason why
CCD had such a bad dark current problem and was not used as image sensing device.
CCD and CMOS are useful as the charge transfer device (CTD), NOT image sensors.




Basic Physics of Image Sensor

Photo generated electron hole pairs can be separated in
the presence of strong electric field. The electric field is
normally poduced inside the depletion region of PN junction.

However, P+P Gaussian doping profile can also create
the built-in potential barrier VB of kT ln (NS/NA) where
NS is the P+ doping level and NA is the P doping level.

Pinned Photodiode has the surface P+ heavily doped
home accumulation (SONY HAD) which creates the
built-in potential barrier VB of kT ln (NS/NA) . This
potential barrier creates the strong electric field
which helps the surface separation of the photo
generated electron and hole pairs of short wave
blue light that cannot penetrate into silicon crystal
more than 0.3 micro meter in depth.


In Pinned Photodiode (SONY HAD) , photo generated electron
and hole pairs at the surface are separated by the strong surface
electric field, which is produced by the surface built-in potential
barrier, created by the surface
P+ heavily doped hole accumulation
layer of SONY Hole Accumualtion Diode (HAD).

Physics of Electron and Hole Pair Separation (EHPS) of Pinned
Photodiode (SONY HAD) for blue light is quite different from
physics of EHPS of the PN junction depletion electric field of
solar cell and regular PN junction photodiode for longer wave
length light. The Pinned Photodiode has the excellent quantum
efficiency fo blue light because the EHPS physics is unique.

The conventional PN jucntion depletion region is nomally located
much deeper in the silicon cyrstal where the blue light cannot reach.

Blue light cannot penetrate more than 0.3 micro meter in depth
into the silicon wafer. The classical N+P junction type has poor
blue light sensitivy because the surface heavily doped N+ layer
is formed more than 0.3 micoro meter in depth.

The N+ region does not have electric field and nuetral. And it
does not have any electric field to separate the photo generated
electron and hole pairs at the surface of the N+ diffusion layer.

The N+P junction depletion region is formed deeper inside of
the silicon crystal where the blue light cannot reach.

Hence, the N+P junction type photodiode has poor blue light sensitivy

The photo generated floating electron and hole pairs at the
silicon surface are drifting closer together inside the N+
electrically nuetral space, and eventually the pairs recombine
each other and disappear as heat.

The blue light quantum efficency of the N+P junction photodiode
is therefore not very good.

On the other hand, Pinned Photodiode (SONY HAD) with
the heavily P+ doped hole accumulation layer at the
silicon surface at the depth within 0.3 micro meter
has the built-in barrier potential of VB = kT ln (NS/NA)
where NS is the impurity atom concentration of
the heavily doped surface P+ hole accumulaton layer
and NA is the doping level of the P type subsrate.

This built-in barrier potential VB creates the built-in
strong electric field which can separate photo generated
electron and hole pairs at the surface.

The photo generated holes are collected at the Pinned
surface
potential region which acts as the hole collector
terminal, while the photo generated electrons can be
seperated away from holes. And electrons can drift into
the buried N type electron charge collecting storage region,
which is located deep inside the bulk silicon cystal, as
originally defined and invented by Hagiwara in 1975.

See Japanese 1975-127646 and 1975-127647 patents.

Visual light cannot penetrate more than 12 mico meters
in depth into the silicon crystal, in analogy to the deep sea
with complete darkness where the sun light cannot reach.

For back light illumination scheme, IR cut filter is enough
to blind the back light from reaching the front wafer area.

The photo electrons stored in the N type storage region can be
extracted completely and can be transfered to the adjacent
charge transfer device (CTD) when reset, to realize the completely
image lag free picture quality for high speed action video cameras.

CCD image sensors were considered as super blue light sensitive,
with low dark current, with low noise and with no image lag because
SONY HAD was used in all CCD image sensors around the world.

Actually, CCD was NOT super sensitive for blue light because
CCD had metalic gate electrodes which does not pass light !!!!

CCD also has serious dark current problems because of the
strong surface electric field induced by the MOS electrodes.

These nice features of the high blue light sensitivity, the low
dark current and the vertical overflow drain are SONY HAD
original features invented by Hagiwara at SONY in 1975. .

They were not CCD features, but the world thought so mistakingly.
That is why CCD became the super star. Actually the SONY HAD
invented by Hagiwara in 1975 was the Super Star behind the curtain.

Pinned Photodiode has also the no image lag feature. But this
feature is nothing new. CCD had the no image lag feature already.

However, CCD does NOT have the vertical overflow drain function,
while SONY HAD is defined as the PNPN jucntion type Pinned
Photodiode with the vertical overflow drain as invented by Hagiwara
at SONY in 1975. See Japanese 1975-134985 patent.


SONY HAD is defined as the P+NPNsub junction type
Pinned Photodiode with the vertical overflow drain, which was
invented in 1975 by Hagiwara. See Japanese 1975-134985 patent.


SONY HAD was hinted by the SONY Bipolar Process Technology developed
by Kawana san and Kato-san. The PNP junction transistors were known to
be built on the N substrate to form the PNPNsub junction thyristor structure.

However, the thyristor punch thru operation mode was a headache for reliabilty
process and device engineers. Hagiwara in 1975 made use of this punch thru
effect as the vertical overflow drain (VOD) in Japanese 1975-134985 patent.



A Brief History of Image Sensors



SONY original HAD was invented in 1975 by Hagiwara at Sony,
as the P+NPNsub Junction type Pinned Photodiode, with the
vertical oveflow drain VOD function. Hagiwara Japanese
1975-127646 patent and 1975-127647 patent also defined
the Global Shutter Buffer Memory (GSBM) and the back light
illumination scheme, which is very much suited for the modern
and the future 3D CMOS image sensors for the super light
sensitivity, the low dark current and the low noise features.

Hagiwara at Sony invented Sony HAD in 1975.

See Japanese 1975-127646, 1975-127647 and 1975-134985 patents.

Japanese 1975-134985 patent defined the P+ hole accumulation
layer (SONY HAD) on the P+N emitter junction on the NP collector
junction, forming a P+NP transitor structure in the N type substrate
while NEC 1980-123259 patent defined the PN junction in the P type
substrate forming the Buried Photodiode with no image lag feature
and Toshiba 1978-1971 patent defined the N+P junction in the N type
substrate forming the VOD structure. Both NEC and Toshiba patents
were dupicate and invalid since they were filed later than SONY 1975
Hole Accumlation Diode ( HAD ) original Japanese 1975-134985 patent
invented by Hagiwara at Sony in 1975.


Japanese 1975-134985 patent defined the SONY HAD which is the P+NPN
junction type Pinned Photodiode on Nsub with the excellent blue light
sensitivity for good color reprodunction at low light level, the vertical overflow
drain VOD function and the no image lag features.

The low dark current feature of this P+NP junction type Pinned Photodiode
was also reported in 1978 in the Hagiwara1978 paper on the P+NP junction
type Pinned Photodiode used in the 380H x 488V FT CCD image sensor.


Y. Daimon-Hagiwara, M. Abe, and C. Okada,"A 380H x 488V CCD
imager with narrow channel transfer gates,
" Proceedings of the 10th
Conference on Solid State Device, Tokyo, 1978; Japanese Journal
of Applied Physics, vol. 18, Supplement 18-1, pp.335-340, 1979.

Japanese 1978-1971 patent defined the N+P junction on Nsub with
the vertical overflow drain (VOD) feature. But this patent is invalid
since it is a dupicate of Hagiwara 1975-134985 patent.

Japanese 1975-123259 patent defined as the PN junction on Psub
with the no image lag feature. But this patent is invalid since it is
also a dupicate of Hagiwara 1975-134985 patent.

Image Sensor history is also one of the ungly Patent&Money Wars.

SONY was attacked by Fairchild, KODAK, and NEC in the past
on SONY HAD ( Hagiwara 1975 invention of the Pinned Photodiode).

SONY HAD is so important an invention that the war is not ended yet.

There are still small battles and attacks going on against SONY HAD
(Pinned Photodiode) invention. Hagiwara has to struggle to defend
his honor as the inventor of SONY HAD ( the Pinned Photodiode )..







CCD was originally invented as the counter part of the Magnetic Bubble
Memory Analog Shift Register. At the beginning, CCD was considered to be
useful for building a large scale DRAM chip. And the original CCD was not
invented to use as image sensors. However, the surface type CCD had a
very poor charge transfer efficiency of 99.9% which was not good enough
to be used for building a large scale DRAM chip. On the other hand, the
buried channel type CCD has a good charge transfer efficiency of 99.999%,
which was useful for building the analog signal charge transfer device(CTD).

Although the originally intended application of CCD was not the same as the
final application, CCD became the super star in the image sensor world.

However, CCD alone could not have the super star position.

CCD needed SONY HAD to become the super star in the image sensor world.

Now CMOS image sensor needs SONY HAD to become the super star.

Without Hagiwara invention of SONY HAD, CCD would have been useless .

CCD survived with the help of the SONY HAD, Hagiwara 1975 invention,
which is also the Buried Photodiode, the Depletion Photodiode with no
image lag and the PinnedPhotodiode with no dark current.

SONY HAD, the P+N-PNsub junction type Pinned Photodiode also has
the built-in vertical overflow drain function which CCD does not have.

Hagiwara at SONY in 1975 invented the P+N-PNsub junction type
Pinned Photodiode originally to provide the built-in vertical overflow
drain
(VOD) function and the low dark current features. CCD has
already had the low image lag feature. And nothing was new about
the low image lag feature when Hagiwara invented the the P+N-PNsub
junction type Pinned Photodiode. But Hagiwara also showed in the
Patent Figures that the P+N-PNsub junction type Pinned Photodiode
has
the low image lag features. Hagiwara at SONY in 1975 invented
the SONY HAD, the Pinned Photodiode, the Depletion Photodiode
and Buried Photodiode with the vertical overflow drain (VOD) function.
Hagiwara also invented the MOS Capacitor type Global Shutter function
which is needed for CMOS image sensors. Details will be explained.

The CCD type Charge Transfer Device(CTD) is now replaced by the
CMOS type Charge Transfer Device(CTD) and we no longer need CCD.
However, we still need SONY HAD, Hagiwara 1975 invention.

There are basically five types of photodiodes.

(1) N+Psub junction type Photodiode with serious image lag problem.

(2) PNPsub junction type Buried Photodiode.

(3) PN-Psub junction type Depletion Photodiode.

(4) P+N-Psub junction type Pinned Photodiode

(5) P+N-PNsub junction type Sony Hole Accumulation Diode (HAD)

Do you understand the important differences of these five photodiodes ?

Since the introduction of Passport Size SONY CCD Portable Video camera
in 1980s, the SONY HAD was used in the interline CCD image sensors all
over the world. And now the same super light sensitive SONY HAD is still
used in all of the modern High Resolution CMOS image sensors.

We no longer use CCD but we still need the SONY HAD to have the
super light sensitive, low noise, low dark current and low image lag
SONY HAD in all of the modern High Resolution CMOS image sensors.

This SONY HAD was invented by Yoshiaki Hagiwara at Sony in 1975.


Most of the designers of image sensors now are digital circuits and system
design engineers without strong semiconductor device physics background.


Hagiwara now wishes to explain the image sensor engineers
Basic Japanese Patents related to Pinned Photodiode invention.





SONY Image Sensors were developped by the experienced Bipolar Process Engineers

educated and guided by Kawana-san and Kato-san, who are the pioneering SONY

Bipolar Process engineers in 1950s and 1960s. Later, Iwama-san ( SONY President )

appointed Kawana-san and Kato-san as the top management leaders of SONY CCD

Image Sesnor Process Developments. Hagiwara later in 1975 joined SONY as the chief

design engineer of the CCD image sensors, and worked for Kawana-san and Kato-san.





The reason why NEC 1980 patent and Toshiba 1978 patent are invalid.

Yamada at Toshiba in Japanese Patent 1978-1971 defined the surface
photodiode type(A) which is the simple NPNsub junction diode with
the built-in vertical overflow drain (VOD). Shirai and Teranishi at NEC
in Japanese Patent 1980-123259
defined the Buried Photodiode type(B)
which is the simple PNPsub junction Depletion Photodiode with low
image lag feature. Hagiwara at Sony in Japanese Patent 1975-134985
defined the Buried, Depletion and Pinned Photodiode, a combination
of type(A) and type(B) photodiodes, which is the PNPNsub junction
(thyristor) type photodiode with low dark current and low image lag
features with the vertical overflow drain (VOD) function. Since Hagiwara
already invented type(A) and type(B) photodiodes in 1975, both Toshiba
Patent 1978-1971
and NEC Patent 1980-123259 are duplicate, late and invalid.


SONY image sensor business became very strong being protected
by Hagiwara 1975 patent. while NEC gave up image sensor business
and Toshiba image sensor business was merged with SONY business.

This is the real history of the image sensor business world.

SONY had to fight against KODAK and Fairchild to protect SONY HAD.



NEC 1980 patent does not have the P+ surface hole accumulation layer.

Hole reaching the surface has to migrate slowly to the adjacent channel
stop region. The hole movements are slow and random and may catch
the signal electrons to recombine again, resulting the poor quantum
efficiency. A very deep knowledge with physics background is needed
to understand semiconductor device behaviors in solid image sensors.


The reason why NEC 1980 patent is invalid.

The reason why NEC 1980 patent and Toshiba 1978 patent are invalid.

Yamada at Toshiba in Japanese Patent 1978-1971 defined the surface
photodiode type(A) which is the simple NPNsub junction diode with
the built-in vertical overflow drain (VOD). Shirai and Teranishi at NEC
in Japanese Patent 1980-123259 defined the Buried Photodiode type(B)
which is the simple PNPsub junction Depletion Photodiode with low
image lag feature. Hagiwara at Sony in Japanese Patent 1975-134985
defined the Buried, Depletion and Pinned Photodiode, a combination
of type(A) and type(B) photodiodes, which is the PNPNsub junction
(thyristor) type photodiode with low dark current and low image lag
features with the vertical overflow drain (VOD) function.

Since Hagiwara already invented type(A) and type(B) photodiodes in
1975, and the vertical overflow drain (VOD) function and the low image
lag feature Buried Photodiode were both common public knowledge
in 1975, both Toshiba Patent 1978-1971 and NEC Patent 1980-123259
are late, duplicate and invalid.





Historically, Toshiba once tried to attack NEC 1980 Patent(B) on the
PNPsub junction type photodiode patent shown above since Toshiba
1978 Patent(A) on the NPNsub junction photodiode is structure-wise
very similar.
However even the structure looks the same, the intended
purpose of its usage is very different,
and Toshiba 1978 patent did
not clearly describe the feature of the completely depleted charge
collecting region which NEC 1980 patent defined. Toshiba's claim was
rejected by the Japanese Patent Office. The judgement made by the
Japanese Patent Office was correct. However,
the Japanese Patent
Office neglected the three SONY 1975 Patents, 1975-127646, 1975-127647
and 1975-134985 on the Buried Photodiode with the feature of the
completely depleted charge collecting region,
which was a public knowledge
by 1977. Hence NEC 1980 patent of low lag image feature is invalid.



SONY 1975 patent on the P+NPNsub junction type Pinned Photodiode
was described to have the feature of the completely depleted charge
collecting N region that NEC 1980 patent defined in 1980, which was
a public knowledge by 1977. See the Fig. 6 drawn in the SONY 1975
patent 1975-134985. Therefore, we can conclude that NEC 1980 patent
is invalid since at the time NEC filed NEC 1980 patent in 1980, SONY 1975
patent already had the feature of the completely depleted charge collecting
N region and became public knowledge.

The feature of the completely depleted charge collecting N region was
only described in Fig. 6 of SONY 1975 patent 1975-124985. Therefore,
the concept of Depletion Photodiode with no image lag was already
established and became public knowledge in 1975 by this SONY Hagiwara
1975 Patent 1975-134985.

Hagiwara filed two sister patents 1975-127646 and 1975-127647. Both of
these two patents also show the feature of the completely depleted charge
collecting region which realizes the low image lag feature. The detailed
features of the SONY 1975 Patent 1975-127647 and 1975-134985 are shown
and compared below. These figures show just application examples. The
patent claims defined in the Japanese words are powerful and universally
applicable to many kinds of image sensor structures. Hagiwara at SONY
had drawn these figures in 1975 which clearly showed the Buried Photodiode
( Pinned Photodiode ) with the feature of the completely signal charge
depleted charge collecting storage region. Hence the details of NEC 1980
patent claims and Toshiba 1978 patent claim were already public knowledge.
And both the Toshiba 1978 patent andthe NEC 1980 patent are invalid.



Fossum wrote a fake paper in 2014
insulting SONY HAD and Hagiwara, the inventer of the
Buried photodiode, Depletion Phtoodiode, Pinned Photodiode
and SONY Hole Accumulation Diode (SONY original HAD).

Fossum became a big stupid liar due to his ignorance,
because he wrote a fake paper with no detailed knowlege
of SONY1975Patents, 1975-127646, 1975-127646 and
1975-127647 which defined the P+NPNsub junction
type Pinned Photodiode with the feature of the completely
depleted charge collection N storage region to realize
the low image lag pictures for fast action video cameras.


Obviously, Fossum never read the Japanese Patent Claims which

defined the P+NPNsub junction (thyristor) type Pinned Photodiode,

which is also the Depletion Photodiode and the Buried Photodiode

with the built-in vertical overflow drain (VOD) function since the

punch-thru operational mode of the P+NPNsub junction (thyristor)

was well known among the bipolar process and device engineers.



Fossum made the serious false statements deceiving the world, inviting also
the misjudgements of the Queen of U.K. and the Emperor of Japan.

Fossum claimed that Hagiwara never invented the Pinned Photodiode with
the low image lag features. But the Figures in Hagiwara 1975 patents clearly
showed that Hagiwara invented the Pinned Photodiode with the low image
lag features and with the built-in vertical overflow drain (VOD) function.



Peter Noble in 1966 invented the in-pixel AMP MOS image sensor,
which is the base of the modern CMOS image sensor..

Yoshiaki Hagiwara invented the P+NPNsub photodiode
which is the base of the Pinned Photodiode and SONY HAD.

We all knew that CMOS Process Scaling and Gordon Moore's Law.

Fossum did not invent the MOS Image sensor.
Teranishi did not invent the Pinned Photodiode.


Fossum was not fair, attacking Hagiwara 1975 patents on the
Pinned Photodiode with false statements in his 2014 paper.

Dilligent engineers all over the world including SONY engineers
developped the CCD and CMOS image sensors.

Fossum made the serious false statements deceiving the world,
and also inviting the misjudgements of the Queen of U.K. and
the Emperor of Japan.



Sony developed the semiconductor technology for a portable transistor radio

and then CCD image sensors for mass production.

But SONY was not inventor of the transistor nor the inventor of CCD.

However , SONY invented Hole Accumulation Diode (HAD),

which is the P+NP junction Pinned Photodiode

with the Nsub vertical overflow drain (VOD).

NEC used Buried Photodiode first time in the ILT CCD image sensor in 1980.

But Buried Depletion and Pinned Photodiode were all Hagiwara 1975 inventions.

Teranishi at NEC did NOT invent Pinned Photodiode.


Hagiwara at Sony invented Pinned Photodiode.

See Japanese 1975-127647 and 1975-134985 patents.



Teranishi did not invent the Pinned Photodiode.

As Prof. Albert Theuwissen claimed in his 2006
paper, the Pinned Photodiode with the Pinned
Window and the Pinning Surface potential was
for the first time in the world reporeted in the
Hagiwara 1978 paper, which is based on the
Hagiwara 1975 Japanese Patent 1975-134985.

Obviously, 2017 QWPrize Winners had a wrong
person for the inventor of the Pinned Photodiode.




Tutorial for Image Sensor



Image sensor is made of two important parts.

(A) Charge Transfer Device (CTD)

(B) Pinned Photodiode


(A) One is the signal charge transfer device (CTD)
that transports the signal charge ( photo electrons )
to the output circuits such as the Cache SRAM, the
Nonvolatile RAM (NVRAM) and the processor unit.

In 1990s, the CCD type CTD was used widely. Now
the CMOS type CTD is used widely all over the world.


(B) And the other is the light detecting photodiode
that generates the signal electronic charge carriers
( photo electrons ) according to the incoming light.

This important photodiode is called Pinned Photodiode,
which is identical to SONY Hole Accumualtion Diode (HAD).




Please see the two reference 1977 and 1978 Hagiwara Papers.


Y. Daimon-Hagiwara, M. Abe, and C. Okada,"A 380H x 488V CCD
imager with narrow channel transfer gates,
" Proceedings of the 10th
Conference on Solid State Device, Tokyo, 1978; Japanese Journal
of Applied Physics, vol. 18, Supplement 18-1, pp.335-340, 1979.

Yoshiaki Daimon-Hagiwara, "Two Phase CCD with Narrow-Channel
Transfer Regions," Proceedings of the 9th Conference on Solid State
Device, Tokyo, 1977; Japanese Journal of Applied Physics, vol. 17,
Supplement 17-1, pp.225-261, 1978.


In these two paper, Hagiwara reported how to make the P+ surface

hole accumulation layer to form the P+NPsub junction type Pinned

Photodiode, which is later also called as SONY HAD sensor.

"Then, using the polysilicon patterning as an ion implantation mask,

boron ions with the dose level of 2 x 10(13) cm(-2) are implanted

into the silicon substrate throughout the exposed portions of the

thermally grown oxide."

Also see three Japanese Patents 1975-127646, 1975-127647 and
1975-134985 on the Buried Photodiode, the Depletion Photodiode
and the Pinned Photodiode with the vertical overflow drain (VOD).



The light detecting Pinned Photodiode is very important.

This photodiode must be super sensitive to the
incoming light with very low trap (1/f) noise, very
low dark current and very low image lag features.

Pinned Photodiode invented by Hagiwara at SONY
in 1975 has these important features.


The CMOS image sensor is the CMOS type Charge
Transfer Device (CTD) with Pinned Photodiode.

Pinned Photodiode invented in 1975 by Hagiwara was
used in Interline Transfer CCD image sensors in 1990s.

Now the Pinned Photodiode is used widely in modern
CMOS image sensors all over the world.








(A) There are three types of charge transfer device (CTD)


(A1) Classical MOS type Charge Transfer Device (CTD)
with large thermal (CkT) noise and clock noise.

(A2) CCD type Charge Transfer device(CTD) which was
the Super Star used in the digital vedio camera in 1990s.

(A3) Modern CMOS type Charge Transfer Device (CTD)
with in-pixell 3Tr source follower active appmlifier circuit.

We no longer need CCD type Charge Transfer Device (CTD).

CCD has a large power consumption and the limited charge
transfer efficicienty ( 99.999% ) which is not good enough
for the high definition 4K and 8K digital TV picture quality.





(B) Study the difference and common features of photosensors.


There are five basic photodiode structures..



(B1) N+P junction photodiode

with the feature of good blue light sensitivity
but with the problem of serious imag lag..



(B2) PNPsub junction type Buried Photodiode

with the feature of good blue light sensitivity.

Buried Photodiode is not by necessity Depletion Photodiode.

Buried Photodiode is not by necessity Pinned Photodiode.


(B3) PN-Psub junction type Depletion Photodiode

which is also Buried Photodiode with good blue sensitivy.

Depletion Photodiode has the good feature of no image lag.

Depletion Photodiode is not by necessity Pinned Photodiode.


(B4) P+N-Psub junction type Pinned Photodiode

which is also Buried Photodiode with good blue sensitivy,
which is also Depletion Photodide with no image lag problem.

Pinned photodiode has the P+ surface hole accumulation layer
with the good feature of no surface dark current.

(B5) P+N-PNsub junction type SONY Hole Accumulation Diode (HAD)
invented by Hagiwara at SONY in 1975 in Japanese Patent 1975-134985,

with in-pixell and built-in vertical overflow drain (VOD) function,
which is also Buried Photodiode with good blue sensitivy,
which is also Depletion Photodide with no image lag problem,
which is also Pinned Photodiode with no surface dark current.
















(1) What is the Buried Photodiode ???




(2) What is the Depletion Photodiode ???




(3) What is the Pinned Photodiode ???




(4) What is SONY HAD ( Hole Accumulation Diode ) sensor ????




Recommended Reference Book written by Yoshiaki Hagiwara  
      
The World of Artificial Intelligent Digital Cirucuits


Relatied Topics :

Study Special Relativity

Study Korean

Study Abura-waka-zan

Learn about SSIS

Learn about SSIS Tutorials




When Hagiwara was a PhD student at Caltech, in
Pasadena California USA, under the guidance of
Prof. Carver Mead, Hagiwara designed a Fast 128 bit
digital data stream parallel comparator chip, which
was fabricated at Intel with the Intel 1101 PMOS DRAM
process technology. Hagiwara learned the Intel vision on
the MOS process scaling rules which was later known as
Gordon Moore's MOS Scaling Rule as named by Prof. Mead.

We no longer need CCD image sensors because of the
CMOS Process Scaling advancement. We now have a
very good picture quality with the in-pixel 3 Tr source
follower active curcuit invented by Peter Noble in 1966
and the Pinned Photodiode invented by Yoshiaki Hagiwara
at SONY in 1975. See Japanese Patent 1975-134985.












Hagiwara invented the Pinned Photodiode in 1975.

******************************



https://www.jstage.jst.go.jp/article/tvtr/3/33/3_KJ00001962730/_article/-char/ja/






SONY developed the P+NP junction type Pinned Photodiode for the fisrt time
in the world in 1978 which was used in Frame Transfer CCD image sensor.

See Hagiwara 1978 the P+NP junction type Pinned Photodiode paper.

The original 1975 Japanese patents defined the P+NPNsub junction type
Pinned Photodiode used in Interline Transfer (ILT) CCD Image Sensor.

SONY already had the Thin Polysilicon Transparent Gate Electrode type
Interline Transfer (ITL) CCD Image Sensor on Production Line as shown
above. SONY efforts were focused on the built-in vertical overflow drain
(VOD) with the P+ surface hole accumulation type Pinned Photodiode, as
originally invented by Hagiwara at Sony in 1975 in his three Japanese Patents,
1975-127646, 1975-127647 and 1975-134985.




Pinned_Photodiode_1978_Paper_by_Hagiwara.pdf

https://www.jstage.jst.go.jp/article/tvtr/4/41/4_KJ00001963301/_article/-char/ja/


Pinned_Photodiode_and_SONY_HAD_Sensor_invented_by_Hagiwara.pdf


Hagiwara is the inventor of the P+NPsub junction type Pinned Photodiode.

See the Hagiwara 1978 paper shown below, published in the International
Semicondutor Device Conference held in Tokyo in 1978 .



The importance of the surface P+ hole accumulation lay of the Pinned Photodiode
was reported in this Hagiwara 1978 paper at the International Semicondoctor Device
Conference held in Tokyo. Pinned_Photodiode_1978_Paper_by_Hagiwara.pdf

https://www.jstage.jst.go.jp/article/tvtr/4/41/4_KJ00001963301/_article/-char/ja/





Hagiwara explained that the P+NPsub junction type Pinned Photodiode

has very low surface dark current and very exellent blue light sensitivity.







Yoshiaki Hagiwara was invited in the following five international
conferences because of his contributions to the image sensor
community and related digital system LSI chip design works.

See the five invited talks related to the Pinned Photo Diode
which is also called as SONY original Hole Accumulation
Diode (HAD) image sensor.

(1) International Conference CCD79 in Edinburgh, Scotland UK

See https://www.imagesensors.org/Past%20Workshops/1979%20CCD79/03-1%20Hagiwara.pdf

(2) International Conference ESSCIRC2001 in Vilach, Austria.

See http://www.aiplab.com/ESSCIRC2001.pdf

(3) International Conference ESSCIRC2008 in Edinburgh, Scotland UK

See http://www.aiplab.com/0-ESSCIRC2008Hagiwara.pdf

(4) International Conference ISSCC2013 in San Francisco, California USA

See http://www.aiplab.com/ ISSCC2013PanelTalk.pdf

(5) IEEE Computer Society Coolchips2017 Conference at Yokohama, Japan


See http://www.coolchips.org/2017/?page_id=10#panel


Related Works by Hagiwara

(1) Pinned Photo Diode (P+NP) and SONY HAD
(P+NPNsub) are the same thing. Both were invented
by Hagiwara at Sony in 1975 in the Japanese Patents

See http://www.aiplab.com/Pinned_Photo_Diode_1975_invented_by_Hagiwara.pdf

(2) For MOS CTG Global Shutter Memory and Back Light Illumination
PP-NP+N-N+ junction Pinned Photodiode Patent ,
see http://www.aiplab.com/JP1975-127646.pdf

Hagiwara is the inventor of the Buried Photodiode.

See the Japanese Patent 1975-127646 shown below.



(3) For MOS CTG Global Shutter Memory and Back Light Illumination
NP+N-N+ junction Pinned Photodiode Patent,
see http://www.aiplab.com/JP1975-127647.pdf

Hagiwara is the inventor of the Depletion Photodiode,

with no image lag. See the empty potential well drawn in

Fig. 7 of the Japanese Patent 1975-127647 shown below.



(4) For the built-in Vertical Overflow Drain (VOD) function type
P+NPNsub junction Pinned Photodiode Patent,
see http://www.aiplab.com/JP1975-134985.pdf


Hagiwara is the inventor of the Pinned Photodiode,

with low surface dark current and with the vertical

overflow drain (VOD) function. Read the patent claims

described exactly in the Japanese Patent 1975-134985.







Please note that Toshiba 1978 VOD Patent is INVALID, which is a duplicate
of Hagiwara 1975 invention Patent (1975-134985) as explained above.

Please note that NEC 1980 Buried Photodiode Patent is also INVALID,
which is a duplicate of Hagiwara 1975 invention Patent (1975-134985).




NEC 1980 patent does not have the P+ surface hole accumulation layer.

Hole reaching the surface has to migrate slowly to the adjacent channel
stop region. The hole movements are slow and random and may catch
the signal electrons to recombine again, resulting the poor quantum
efficiency. A very deep knowledge with physics background is needed
to understand semiconductor device behaviors in solid image sensors.


(5) When Hagiwara was a PhD student at Caltech, in
Pasadena California USA, under the guidance of
Prof. Carver Mead, Hagiwara
designed a Fast 128 bit
digital data stream parallel comparator chip, which
was fabricated at Intel with the Intel 1101 PMOS DRAM
process technology. Hagiwara learned the Intel vision on
the MOS process scaling rules which was later known as
Gordon Moore's MOS Scaling Rule as named by Prof. Mead.

We no longer need CCD image sensors because of the
CMOS Process Scaling advancement. We now have a
very good picture quality with the in-pixel 3 Tr source
follower active curcuit invented by Peter Noble in 1966
and the Pinned Photodiode invented by Yoshiaki Hagiwara
at SONY in 1975. See Japanese Patent 1975-134985.




See http://www.aiplab.com/128_bit_Comparator.pdf

(6) Hagiwara designed a Fast 25 nanosecond access time
4 M bit Cache SRAM chip for digital camera applications.
Intel used the SONY SRAM chips in the Intel boards.
Sony enjoyed SRAM business while many semiconductor
companies in Japan were focusing on the 4 M bit DRAM
chip business.


See http://www.aiplab.com/SONY_4MSRAM_1989.pdf





Pinned Photodiode (SONY HAD) Patent War.


NEC and KODAK greedily attacked SONY HAD and
demanded the Buried Pinned Phtodiode patent fee,
proportional to SONY total image sensor sales.

Actually Hagiwara filed three Japanese patents
on Pinned Photodiode (SONY HAD).

Appearantly NEC and KODAK did not understand
the importance of Japanese 1975-134985 patent.

NEC and KODAK ignored the other two important
Pinned Photodiode related inventions described in
Japanese 1975-127646 and 1975-127647 patents.

NEC and KODAK were very greedy and unfair,
attacking SONY and insulting Hagiwara's honor
of the true inventor of the Pinned Photodiode.




SONY Claims in the SONY and NEC Secret Patent War on SONY HAD patent.

SONY and KODAK made final political agreements favoring
SONY after the Pinned Photodiode Secrete Patent War.

Fuji-Sankei News Paper reported the details on Jan 4, 2007.



SONY won the Fairchild-SONY patent war on Pinned Photodiode.



Finally SONY won the Fairchild SONY patent war in 2001 after
more than 10 years of struggle on Hagiwara1975 patent on the
Pinned Photodiode with the vertical overflow drain (VOD) function,
which is identical to SONY Hole Accumulation Diode (SONY HAD).



E-mail Communication with Dr. Toshiyuki Yamada, the director of
the SONY Yokohama Central Reaserch Laboratory on Fairchild Patent War










Hagiwara also received SONY Cyrystal Award for his analytic work
on the image sensor MTF and picture aliaing effect calculations.



Hagiwara contributed a lot for SONY image sensor business but
Hagiwara was not well treated and his achievements were stolen
by his boss ( Ochi-san ) . Ochi-san also received his PhD degree
using Hagiwara's research works on the time (t) and space ( x and y )
MTF and aliasing effect analysis of imaging picture quality in 1970s
at SONY Yokohama Research Center. In his PhD paper, Ochi-san
never quoted Hagiwara research works.

Ochi-san also wrote a book on the image sensor but never made
any comments to acknowledg Hagiwara's contributions on the Fairchild
and SONY patent war on the SONY Hole Accumulaton Diode (HAD).

Ochi-san did not explain that SONY HAD was Hagiwara invention.
Not many people in SONY knew that SONY HAD is Hagiwara invention.




Prof. Albert Theuwissen claims that Hagiwara 1975 patents and
Hagiwara 1978 paper are the evidence that Hagiwara at SONY
is the true inventor of the Buried, Depletion and Pinned Photodiode,
which is also identical to SONY Hole Accumulation Diode (HAD).

E-mail communication with Prof. Albert Theuwissen at Delft Univ.



Prof. Albert Theuwissen said, at the workshop on CMOS imaging

in Duisburg on May 16, 2006 , "The P+NPsub jucntion Pinned

Photodiode reported in Hagiwara 1978 paper is the Mother of

the NEC Buried Photodiode ( reported at IEDM1982 ) and the

KODAK Pinned Photodiode ( reported at IDM1984 ) and SONY

Hole Accumulation Diode (HAD) sensor."



The public WEB shown below claims that Hagiwara 1975 patents
and Hagiwara 1978 paper are the evidence to claim that Hagiwara
is the inventor of Buried, Depletion and Pinned Photodiode.



The fisrt Pinned Photodiode was invented by Hagiwara at Sony.

See the Hagiwara 1975 patents ( 1975-127646, 1975-127647
and 1975-134985 ) and his 1978 paper on P+NPsub junction
type Pinned Photodiode used in the Frame Transfer CCD.

The first Pinned Photodiode is used in Interline Transfer CCD as
described in Hagiwara Japanese Patent 1975-134985 and used as
SONY HAD and now is also used in modern CMOS image sensors.

It has long been incorrcetly attributed to Teranshi ( instead of
Hagiwara ) in ILT CCD image sensors, and to Fossum ( instead
of Peter Noble ) in the in-pixel active CMOS image sensors.

It is important to correct a historical error and misreporting.

Attribution is very important.



Hagiwara invented the in-pixell Global Shutter scheme in his

1975 Japanese Patents ( 1975-127646 and 1975-127647 )




Read the Japanese 1975-127647 patent by Hagiwara at Sony and
convince yourself that the following Fossum 2014 paper is a Fake
paper and Fossum is a big liar, insulting SONY and Hagiwara.

https://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=6742594#search=%27Fossum+2014+paper%27

SONY and Hagiwara still receive Unfair Patent Attacks.



The Hagiwara invented the Pinned Photodiode with no image lag.

The following figures shown in his 1975 are the evidence that
Fossum is a big liar and an international shameful thief in the
sacrid Image Sensor Conmmunity.

I strongly request Fossum, because of his false statements
and ignorance, his public apology to SONY and Hagiwara .


A very deep knowledge with physics background is needed to understand
the small world of semiconductor device behaviors in solid image sensors.

Most of the designers of image sensors now are digital circuits and system
design engineers without strong semiconductor device physics background.










Prof. Kagami explained that SONY HAD, Pinned Photodiode and
Buried Photodiode are the same thing. Yes, they have the common
Buried Photodiode structure. But the Buried Photodiode is not
by necessity Depletion Photodiode with no image lag. And the
Depletion Photodiode is not by necessity Pinned Photodiode which
has the P+ hole accumulation surface layer with no surface dark
current, which is SONY hole accumulation diode (HAD) itself.

Yes, SONY HAD and Pinned Photodiode are identical. AND SONY
HAD and Pinned Photodiode are Buried Photodiode as Prof. Kagami
said. However, the Buried Photodiode, Depletion Photodiode and
Pinned Photodiode were invented by Hagiwara at SONY in 1975.

The evidence is given in Japanese patents filed by Hagiwara in 1975.

See 1975-127646, 1975-127647 and 1975-134985.





Fossum was invited to make a keynote speech on the Buried
Photodiode with no image lag. He said the Buried Photodiode
was invented by Teranishi at NEC in 1980. However, it is not
true.
Fossum never read and understood the three Japanese
patents file by Hagiwara in 1975
, which is the basic patents
on the Buried Photodiode, the Depletion Photodiode and
the Pinned Photodiode patents by Hagiwara at SONY in 1975.

Fossum is a liar making false statements and insulting SONY
and Hagiwara 1975 inventions on the Pinned Photodidode.

I strongly request Fossum, because of his false statements
and ignorance, his public apology to SONY and Hagiwara .





Please see the official WEB site of the Japanese Invention Office

http://koueki.jiii.or.jp/innovation100/innovation_detail.php?eid=00059&test=open&age=

which has the patent citation claims that contradicts the true facts (??).

























**********************







.


Panel Talk 2009 on Artificial Intelligent Partner System (AIPS) after SONY PS3/PS4.



SONY Image Sensors were developped by the experienced Bipolar Process Engineers

educated and guided by Kawana-san and Kato-san, who are the pioneering SONY

Bipolar Process engineers in 1950s and 1960s. Later, Iwama-san ( SONY President )

appointed Kawana-san and Kato-san as the top management leaders of SONY CCD

Image Sesnor Process Developments. Hagiwara later in 1975 joined SONY as the chief

design engineer of the CCD image sensors, and worked for Kawana-san and Kato-san.



SONY HAD was hinted by the SONY Bipolar Process Technology developed
by Kawana san and Kato-san. The PNP junction transistors were known to
be built on the N substrate to form the PNPNsub junction thyristor structure.
However, the thyristor punch thru operation mode was a headache for reliabilty
process and device engineers. Hagiwara in 1975 made use of this punch thru
effect as the vertical overflow drain (VOD) in Japanese 1975-134985 patent.













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The AIPS image sensor watching at its inventor, Yoshiaki Hagiwara.
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hagiwara-yoshiaki@aiplab.com ( http://www.aiplab.com/ )

hagiwara@ssis.or.jp ( http://www.ssis.or.jp/en/index.html )

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